適用於邊緣裝置低延遲腦電圖分類的可微分邏輯閘網路

摘要

在邊緣裝置上進行即時腦電圖（EEG）分類，其瓶頸在於傳統神經網路所需的浮點運算。我們探討了可微邏輯閘網路（Diff-Logic）作為一種硬體原生的替代方案，該方案將模型編譯為純布林電路，並可透過位元層級的CPU運算執行。我們在涵蓋兩項分類任務（二元失智症檢測與三類情緒辨識）的四個EEG資料集上，進行了嚴格的等參數實驗，將Diff-Logic與同等容量的多層感知器（MLP）及二值化神經網路（BNN）基準模型，在四個複雜度層級（5萬至50萬個參數）進行比較。在失智症篩檢中，Diff-Logic達到了80.2%的巨觀F1分數，較MLP基準模型高出6.8%。在情緒辨識方面，MLP保有適度的效能優勢，但當部署於功耗受限（7瓦）的NVIDIA Jetson Orin Nano CPU（單核心）上時，其延遲高出2.3倍，模型大小則達14倍。關鍵的是，Diff-Logic的推論時間在模型規模擴大10倍的情況下幾乎保持恆定，在最高複雜度層級中，相較於MLP取得了2.9倍的峰值加速。我們的研究結果確立了基於邏輯的神經架構作為資源受限腦機介面的實用範式，能夠在滿足可攜式邊緣部署延遲與記憶體限制的同時，達到具有競爭力或更優越的效能。程式碼已公開於GitHub：https://github.com/Shyamal-Dharia/eeg-difflogic

English

Real-time EEG classification on edge devices is bottlenecked by the floating-point arithmetic of conventional neural networks. We investigated Differentiable Logic Gate Networks (Diff-Logic) as a hardware-native alternative that compiles models into pure Boolean circuits executable via bitwise CPU operations. Through rigorous iso-parameter experiments across four EEG datasets spanning two classification tasks, binary dementia detection and 3-class emotion recognition, we compared Diff-Logic against matched-capacity Multi-Layer Perceptron (MLP) and Binarized Neural Network (BNN) baselines at four complexity tiers (50k-500k parameters). On dementia screening, Diff-Logic achieved 80.2% Macro F1, outperforming the MLP baseline by 6.8%. On emotion recognition, the MLP retained a moderate performance advantage but incurred a 2.3times higher latency and 14times larger model size when deployed on a power-constrained (7W) Nvidia Jetson Orin Nano CPU (Single-core). Critically, Diff-Logic inference time remained nearly constant across a 10times increase in model scale, achieving a peak speedup of 2.9times over MLPs at the largest complexity tier. Our results establish logic-based neural architectures as a practical paradigm for resource-constrained brain-computer interfaces, achieving competitive or superior performance while natively satisfying the latency and memory constraints of portable edge deployment. Code is available on GitHub: https://github.com/Shyamal-Dharia/eeg-difflogic