从Pascal到Blackwell的线程束分歧表征

摘要

自Volta架构引入独立线程调度（ITS）以来，NVIDIA GPU一直被普遍认为以固定方式处理线程束分歧。我们以引入ITS之前的Pascal架构为基准，在Ampere、Hopper以及数据中心和消费级Blackwell GPU上验证了这一假设。通过结合周期精确的微基准测试、硬件计数器和编译器生成的SASS静态分析，我们将稳定行为与架构变化区分开来。在所有测试代际中，分歧路径的串行化时间与路径数量k呈线性关系，遵循T(k) ≈ sk，且无超线性再汇聚惩罚。线程束执行效率降至32/k，该惩罚与占用率无关，而断言预测（predication）可消除串行化开销。同样行为在Pascal上出现，表明这一程序员可见的代价模型早于ITS。然而，编译器发出的再汇聚机制已发生实质性变化。Pascal使用基于每线程束的SSY/SYNC指令栈，而后续代际则改用屏障寄存器指令。超越直接后支配点的延迟再汇聚案例从Ampere的29个降至Blackwell的2个。Blackwell还引入了双层汇聚屏障分类、均匀分支指令和显式部分掩码线程束同步，这些在Ampere和Hopper上均未出现。受控位翻转实验表明，新增的屏障分类是静态编译器分类，在我们的测试中未产生可观测的运行时影响。因此，即使NVIDIA的控制流ISA和再汇聚机制持续演进，分歧仍保持稳定且可预测的性能代价。

English

Since Volta introduced Independent Thread Scheduling (ITS), NVIDIA GPUs have been widely assumed to handle warp divergence in a fixed manner. We test this assumption across Ampere, Hopper, and datacenter and consumer Blackwell GPUs, using pre-ITS Pascal as a baseline. Combining cycle-accurate microbenchmarks, hardware counters, and static analysis of compiler-generated SASS, we separate stable behavior from architectural change. Across all tested generations, divergent paths serialize linearly with the number of paths k, following T(k) approx sk with no super-linear reconvergence penalty. Warp execution efficiency falls as 32/k, the penalty is independent of occupancy, and predication removes the serialization cost. The same behavior appears on Pascal, showing that this programmer-visible cost model predates ITS. The compiler-emitted reconvergence machinery, however, has changed substantially. Pascal uses a per-warp SSY/SYNC instruction stack, whereas later generations use barrier-register instructions. Deferred reconvergence beyond the immediate post-dominator falls from 29 cases on Ampere to 2 on Blackwell. Blackwell also introduces a two-tier convergence-barrier classification, uniform-branch instructions, and explicit partial-mask warp synchronization, none of which appear on Ampere or Hopper. Controlled bit-flip experiments indicate that the new barrier class is a static compiler classification with no observable runtime effect in our tests. Thus, divergence retains a stable and predictable performance cost even as NVIDIA's control-flow ISA and reconvergence mechanisms continue to evolve.